Wafers can be classified in the term of resistivity, type and carbon component. The data related to this is presented in all the commercial specifications related to the multi-crystalline wafers and single crystalline wafers which are stated via equivalent standards. The methods for the manufacturing of multi-crystalline silicon wafer are progressively straightforward, and in this manner the ultimate cost of production is less expensive, than those required for single crystalline material. But if compared in the terms of quality, the single crystalline material are of higher than quality than that of the multi-crystalline wafers due to the presence of grain boundaries.
Grain boundaries introduce high localized regions of recombination due to the introduction of extra defect energy levels into the band gap, thus reducing the overall minority carrier lifetime from the material. However, the grain boundaries reduce solar cell performance by blocking carrier flows and providing shunting paths for current flow across the p-n junction. It used to be thought that large grain crystals were the most suitable for multi-crystalline silicon solar cells since larger crystals meant fewer grain boundaries.
However, in recent years it was found that smaller grains gave lower stress at the ground boundaries so they were less electrically active (lower recombination). Presently, most multi-crystalline silicon for solar cells is grown using a process where the growth is seeded to produce smaller grains and referred to as “high performance multi”. To avoid significant recombination losses at grain boundaries, grain sizes on the order of at least a few millimeters are required.
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The drivers for the multi-crystalline wafers market are allowance of single grains to extend from front to back of the cell, provide less resistance to carrier flow and generally decreasing the length of grain boundaries per unit of cell and adoption of multi-crystalline material is used for commercial solar cell production. The factors hampering the multi-crystalline wafers market are inadequate amount of crystalline material present in the wafers at the time they are developed.
The global Multi-crystalline wafers market is segmented into type, size and applications. The multi-crystalline wafers market is segmented into N-Type and P-Type. On the basis of sizes the multi -crystalline wafers market is segmented into 150 mm, 200mm, 300mm, and 450mm wafer sizes. By application segment the multi-crystalline wafers market is further segmented into solar cells, integrated circuits, photoelectric cells, and others. Integrated circuits is the segment that will be the fastest growing among all the other market segments. The applications of integrated circuits involve in each and every electronic circuit board, embedded systems and various electronic projects.
In the region wise study, the global Multi-crystalline wafers market has been segmented into North America, Europe, Asia Pacific, Middle East & Africa, and South America. Asia Pacific which comprises China, India, South Korea, Australia and other rising economies captured significant market share followed by North America and Europe in 2016. Asia Pacific showed the fastest growth rate during the forecast period due to the emerging economies. China represents huge potential for the Multi-crystalline wafers with the low cost of raw materials and huge production facilities in the country. The U.S. and India are expected to be the second largest market after China.
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The global Multi-crystalline wafers market is highly fragmented with number of companies operating in the segment. Leading players are currently focusing on providing cost competitive products to the customers. Some of the key players engaged in Multi-crystalline wafers market include various manufacturers such as Texas Instruments, Inc., ams AG, ON Semiconductor Corporation, Broadcom Limited, Rohm Semiconductor USA, LLC, OSRAM Opto Semiconductor, Intersil, Maxim Integrated, Panasonic Corporation, lan Microelectronics Corp. and Vishay Semiconductor among others.